79 lines
27 KiB
Plaintext
79 lines
27 KiB
Plaintext
E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\bin64\c_hdl.exe -osyn E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\synwork\top_comp.srs -top top -hdllog E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\synlog\top_compiler.srr -encrypt -mp 4 -verification_mode 0 -verilog -prodtype synplify_pro -infer_seqShift -primux -dspmac -pqdpadd -fixsmult -sdff_counter -divnmod -nram -actel -I E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\ -I E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\lib -sysv -devicelib E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\lib\generic\acg5.v -encrypt -pro -dmgen E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\dm -ui -fid2 -ram -sharing on -ll 2000 -autosm -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\syn_comps.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_graytobinconv.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_nstagessync.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_async.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_sync.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_fwft.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_sync_scntr.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\COREFIFO_C0_COREFIFO_C0_0_LSRAM_top.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\COREFIFO_C0_COREFIFO_C0_0_ram_wrapper.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\COREFIFO.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREFIFO_C0\COREFIFO_C0.v -lib COREJTAGDEBUG_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug_bufd.v -lib COREJTAGDEBUG_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug_uj_jtag.v -lib COREJTAGDEBUG_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug_ujtag_wrapper.v -lib COREJTAGDEBUG_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\COREJTAGDEBUG_C0\COREJTAGDEBUG_C0.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_clockmux.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_chanctrl.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_fifo.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_rf.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_control.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi.v -lib CORESPI_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\corespi.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CORESPI_0\CORESPI_0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORETSE\4.0.124\rtl\vlog\core_evaluation\CoreTSE.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CORETSE_0\CORETSE_0.v -lib COREAPB3_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3_muxptob3.v -lib COREAPB3_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3_iaddr_reg.v -lib COREAPB3_LIB E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreAPB3_0\CoreAPB3_0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\Clock_gen.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\Rx_async.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\Tx_async.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\fifo_256x8_g5.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\CoreUART.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\CoreUARTapb.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\CoreUARTapb_0\CoreUARTapb_0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\Core_reset_pf\Core_reset_pf_0\core\corereset_pf.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\Core_reset_pf\Core_reset_pf.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\pkg\miv_rv32_hart_cfg_pkg.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\pkg\miv_rv32_pkg.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\hart_merged\miv_rv32_hart_merged.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\pkg\miv_rv32_subsys_pkg.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\subsys_merged\miv_rv32_subsys_merged.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\memory\miv_rv32_ram_singleport_lp.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Microsemi\MiV\MIV_RV32\3.1.200\memory\miv_rv32_ram_singleport_lp_ecc.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\MIV_RV32_C0\MIV_RV32_C0_0\rtl\miv_rv32.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\MIV_RV32_C0\MIV_RV32_C0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_CCC_0\PF_CCC_0_0\PF_CCC_0_PF_CCC_0_0_PF_CCC.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_CCC_0\PF_CCC_0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\CORECDR4_CNTL_TIP\2.0.100\rtl\vlog\core\corecdr4_cntl_tip.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_LANECTRL_OVERLAY_0\PF_IOD_CDR_C0_PF_IOD_CDR_LANECTRL_OVERLAY_0_PF_IOD.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_RX_N_0\PF_IOD_CDR_C0_PF_IOD_CDR_RX_N_0_PF_IOD.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_RX_P_0\PF_IOD_CDR_C0_PF_IOD_CDR_RX_P_0_PF_IOD.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_TX_0\PF_IOD_CDR_C0_PF_IOD_CDR_TX_0_PF_IOD.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_LANECTRL_0\PF_LANECTRL_PAUSE_SYNC.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_LANECTRL_0\PF_IOD_CDR_C0_PF_LANECTRL_0_PF_LANECTRL.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_C0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\Actel\DirectCore\COREDELAYCODE_TIP\2.1.100\rtl\vlog\core\CoreDelayCode_TIP.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_CCC_C0\PF_CCC_0\PF_IOD_CDR_CCC_C0_PF_CCC_0_PF_CCC.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_CCC_C0\PF_CLK_DIV_0\PF_IOD_CDR_CCC_C0_PF_CLK_DIV_0_PF_CLK_DIV.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_CCC_C0\PF_LANECTRL_CORE_READER_0\PF_LANECTRL_PAUSE_SYNC.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_CCC_C0\PF_LANECTRL_CORE_READER_0\PF_IOD_CDR_CCC_C0_PF_LANECTRL_CORE_READER_0_PF_LANECTRL.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_IOD_CDR_CCC_C0\PF_IOD_CDR_CCC_C0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_TPSRAM_C0\PF_TPSRAM_C0_0\PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\PF_TPSRAM_C0\PF_TPSRAM_C0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\hdl\SSDetect.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\hdl\fifo_to_tpsram_bridge.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\pf_init_monitor_0\pf_init_monitor_0_0\pf_init_monitor_0_pf_init_monitor_0_0_PF_INIT_MONITOR.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\pf_init_monitor_0\pf_init_monitor_0.v -lib work E:\AbhishekV\rising\ethernet_tpsram_test\component\work\top\top.v -jobname "compiler"
|
|
relcom:..\..\..\..\..\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\bin64\c_hdl.exe -osyn ..\synwork\top_comp.srs -top top -hdllog ..\synlog\top_compiler.srr -encrypt -mp 4 -verification_mode 0 -verilog -prodtype synplify_pro -infer_seqShift -primux -dspmac -pqdpadd -fixsmult -sdff_counter -divnmod -nram -actel -I ..\ -I ..\..\..\..\..\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\lib -sysv -devicelib ..\..\..\..\..\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro\lib\generic\acg5.v -encrypt -pro -dmgen ..\dm -ui -fid2 -ram -sharing on -ll 2000 -autosm -lib work ..\..\component\syn_comps.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_graytobinconv.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_nstagessync.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_async.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_sync.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_fwft.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\corefifo_sync_scntr.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\COREFIFO_C0_COREFIFO_C0_0_LSRAM_top.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\COREFIFO_C0_COREFIFO_C0_0_ram_wrapper.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0_0\rtl\vlog\core\COREFIFO.v -lib work ..\..\component\work\COREFIFO_C0\COREFIFO_C0.v -lib COREJTAGDEBUG_LIB ..\..\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug_bufd.v -lib COREJTAGDEBUG_LIB ..\..\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug_uj_jtag.v -lib COREJTAGDEBUG_LIB ..\..\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug_ujtag_wrapper.v -lib COREJTAGDEBUG_LIB ..\..\component\Actel\DirectCore\COREJTAGDEBUG\4.0.100\core\corejtagdebug.v -lib work ..\..\component\work\COREJTAGDEBUG_C0\COREJTAGDEBUG_C0.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_clockmux.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_chanctrl.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_fifo.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_rf.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_control.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi.v -lib CORESPI_LIB ..\..\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\corespi.v -lib work ..\..\component\work\CORESPI_0\CORESPI_0.v -lib work ..\..\component\Actel\DirectCore\CORETSE\4.0.124\rtl\vlog\core_evaluation\CoreTSE.v -lib work ..\..\component\work\CORETSE_0\CORETSE_0.v -lib COREAPB3_LIB ..\..\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3_muxptob3.v -lib COREAPB3_LIB ..\..\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3_iaddr_reg.v -lib COREAPB3_LIB ..\..\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3.v -lib work ..\..\component\work\CoreAPB3_0\CoreAPB3_0.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\Clock_gen.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\Rx_async.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\Tx_async.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\fifo_256x8_g5.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\CoreUART.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core\CoreUARTapb.v -lib work ..\..\component\work\CoreUARTapb_0\CoreUARTapb_0.v -lib work ..\..\component\work\Core_reset_pf\Core_reset_pf_0\core\corereset_pf.v -lib work ..\..\component\work\Core_reset_pf\Core_reset_pf.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\pkg\miv_rv32_hart_cfg_pkg.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\pkg\miv_rv32_pkg.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\hart_merged\miv_rv32_hart_merged.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\pkg\miv_rv32_subsys_pkg.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\subsys_merged\miv_rv32_subsys_merged.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\memory\miv_rv32_ram_singleport_lp.v -lib work ..\..\component\Microsemi\MiV\MIV_RV32\3.1.200\memory\miv_rv32_ram_singleport_lp_ecc.v -lib work ..\..\component\work\MIV_RV32_C0\MIV_RV32_C0_0\rtl\miv_rv32.v -lib work ..\..\component\work\MIV_RV32_C0\MIV_RV32_C0.v -lib work ..\..\component\work\PF_CCC_0\PF_CCC_0_0\PF_CCC_0_PF_CCC_0_0_PF_CCC.v -lib work ..\..\component\work\PF_CCC_0\PF_CCC_0.v -lib work ..\..\component\Actel\DirectCore\CORECDR4_CNTL_TIP\2.0.100\rtl\vlog\core\corecdr4_cntl_tip.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_LANECTRL_OVERLAY_0\PF_IOD_CDR_C0_PF_IOD_CDR_LANECTRL_OVERLAY_0_PF_IOD.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_RX_N_0\PF_IOD_CDR_C0_PF_IOD_CDR_RX_N_0_PF_IOD.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_RX_P_0\PF_IOD_CDR_C0_PF_IOD_CDR_RX_P_0_PF_IOD.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_TX_0\PF_IOD_CDR_C0_PF_IOD_CDR_TX_0_PF_IOD.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_LANECTRL_0\PF_LANECTRL_PAUSE_SYNC.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_LANECTRL_0\PF_IOD_CDR_C0_PF_LANECTRL_0_PF_LANECTRL.v -lib work ..\..\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_C0.v -lib work ..\..\component\Actel\DirectCore\COREDELAYCODE_TIP\2.1.100\rtl\vlog\core\CoreDelayCode_TIP.v -lib work ..\..\component\work\PF_IOD_CDR_CCC_C0\PF_CCC_0\PF_IOD_CDR_CCC_C0_PF_CCC_0_PF_CCC.v -lib work ..\..\component\work\PF_IOD_CDR_CCC_C0\PF_CLK_DIV_0\PF_IOD_CDR_CCC_C0_PF_CLK_DIV_0_PF_CLK_DIV.v -lib work ..\..\component\work\PF_IOD_CDR_CCC_C0\PF_LANECTRL_CORE_READER_0\PF_LANECTRL_PAUSE_SYNC.v -lib work ..\..\component\work\PF_IOD_CDR_CCC_C0\PF_LANECTRL_CORE_READER_0\PF_IOD_CDR_CCC_C0_PF_LANECTRL_CORE_READER_0_PF_LANECTRL.v -lib work ..\..\component\work\PF_IOD_CDR_CCC_C0\PF_IOD_CDR_CCC_C0.v -lib work ..\..\component\work\PF_TPSRAM_C0\PF_TPSRAM_C0_0\PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM.v -lib work ..\..\component\work\PF_TPSRAM_C0\PF_TPSRAM_C0.v -lib work ..\..\hdl\SSDetect.v -lib work ..\..\hdl\fifo_to_tpsram_bridge.v -lib work ..\..\component\work\pf_init_monitor_0\pf_init_monitor_0_0\pf_init_monitor_0_pf_init_monitor_0_0_PF_INIT_MONITOR.v -lib work ..\..\component\work\pf_init_monitor_0\pf_init_monitor_0.v -lib work ..\..\component\work\top\top.v -jobname "compiler"
|
|
rc:0 success:1 runtime:260
|
|
file:..\synwork\top_comp.srs|io:o|time:1776394897|size:2499581|exec:0|csum:
|
|
file:..\synlog\top_compiler.srr|io:o|time:1776394897|size:341815|exec:0|csum:
|
|
file:..\..\..\..\..\microchip\libero_soc_2025.1\libero_soc\synplify_pro\lib\generic\acg5.v|io:i|time:1745932376|size:43686|exec:0|csum:C5B8CD150154D193C7B0D4301122DDFB
|
|
file:..\..\component\syn_comps.v|io:i|time:1776394635|size:503210|exec:0|csum:61997591488512FD15E995A0BA926A34
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_graytobinconv.v|io:i|time:1776257512|size:2549|exec:0|csum:3B561D021343444B62F9D4C4119801FD
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_nstagessync.v|io:i|time:1776257512|size:2332|exec:0|csum:68B6F36E039AA13AB5646664E829CB24
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_async.v|io:i|time:1776257512|size:55032|exec:0|csum:11504F3ABB8D7532F20883FC0D89CFE5
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_sync.v|io:i|time:1776257512|size:33348|exec:0|csum:1DF02345104B5FA397C9E194DDBA2805
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_fwft.v|io:i|time:1776257512|size:13313|exec:0|csum:C983EF5494814F252AC011027EA63641
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_sync_scntr.v|io:i|time:1776257512|size:23539|exec:0|csum:6BF810F0EF19C2F4EB24F6508ABC0058
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_c0_corefifo_c0_0_lsram_top.v|io:i|time:1776257512|size:4400|exec:0|csum:84D6BFEBB1F9265679C55936C9BCDA63
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo_c0_corefifo_c0_0_ram_wrapper.v|io:i|time:1776257511|size:2224|exec:0|csum:448440FE5CE0AED127CF031792A738AC
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0_0\rtl\vlog\core\corefifo.v|io:i|time:1776257512|size:71458|exec:0|csum:4127AB52FA9DD69B847C14E4385CE2D0
|
|
file:..\..\component\work\corefifo_c0\corefifo_c0.v|io:i|time:1776257512|size:5479|exec:0|csum:4C59BCE2EB4DC43BCFA2330D71F83996
|
|
file:..\..\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug_bufd.v|io:i|time:1776075072|size:1033|exec:0|csum:28EB13D1C0DABA4C84B6D6F5D6B624DB
|
|
file:..\..\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug_uj_jtag.v|io:i|time:1776075072|size:18296|exec:0|csum:34065F00937041F8F4CDF1D3A764A7F5
|
|
file:..\..\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug_ujtag_wrapper.v|io:i|time:1776075072|size:6203|exec:0|csum:6DE1B54A6BB0949154549E037D419ADA
|
|
file:..\..\component\actel\directcore\corejtagdebug\4.0.100\core\corejtagdebug.v|io:i|time:1776075072|size:24714|exec:0|csum:4FA4FDE2E2EB463F654B256326BBF3B3
|
|
file:..\..\component\work\corejtagdebug_c0\corejtagdebug_c0.v|io:i|time:1776096661|size:12057|exec:0|csum:FBD5E4E1EEE77BA8BE54BD2F9919A514
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_clockmux.v|io:i|time:1776075075|size:1034|exec:0|csum:5E00FCF26BEAD9E24547EEC81E88C4A1
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_chanctrl.v|io:i|time:1776075075|size:42389|exec:0|csum:727546087DDE4AAA4C9E367E2854E37B
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_fifo.v|io:i|time:1776075075|size:6157|exec:0|csum:DDFB6E3FBC011E95DC6D5A6705DECB83
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_rf.v|io:i|time:1776075075|size:9209|exec:0|csum:5D15D445E02E1AD3B7DB5ECB02C8EAEF
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi_control.v|io:i|time:1776075075|size:3070|exec:0|csum:6BBA657761C3E9A25B1AB9E68E7C7C59
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\spi.v|io:i|time:1776075075|size:13098|exec:0|csum:DDFB03C15DDA34B1F39D15273405DBEC
|
|
file:..\..\component\actel\directcore\corespi\5.2.104\rtl\vlog\core\corespi.v|io:i|time:1776075075|size:4698|exec:0|csum:3B66FE86EC50AC33CB039E0B58750262
|
|
file:..\..\component\work\corespi_0\corespi_0.v|io:i|time:1776096664|size:5974|exec:0|csum:209F7332F3F0576CA0EB9D6182C06891
|
|
file:..\..\component\actel\directcore\coretse\4.0.124\rtl\vlog\core_evaluation\coretse.v|io:i|time:1776075082|size:3205609|exec:0|csum:2417C162C416660B36667F0F6A7110C5
|
|
file:..\..\component\work\coretse_0\coretse_0.v|io:i|time:1776096672|size:11479|exec:0|csum:BCF9582C4793658C94856E6062CAA6CA
|
|
file:..\..\component\actel\directcore\coreapb3\4.2.100\rtl\vlog\core\coreapb3_muxptob3.v|io:i|time:1776075074|size:5708|exec:0|csum:62760A893104B8E7C9EE95AF6FE4EB76
|
|
file:..\..\component\actel\directcore\coreapb3\4.2.100\rtl\vlog\core\coreapb3_iaddr_reg.v|io:i|time:1776075074|size:4465|exec:0|csum:204785D2FD68CCDD40DD437A629883AA
|
|
file:..\..\component\actel\directcore\coreapb3\4.2.100\rtl\vlog\core\coreapb3.v|io:i|time:1776075074|size:29701|exec:0|csum:06515C562E664B424C2D2983DE6B783B
|
|
file:..\..\component\work\coreapb3_0\coreapb3_0.v|io:i|time:1776096663|size:13295|exec:0|csum:E0950E1AA5CAA4C69454EED8C41EEC18
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\clock_gen.v|io:i|time:1776096673|size:13262|exec:0|csum:ACC0015854CDA7A9D8358CA6D57553C7
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\rx_async.v|io:i|time:1776096673|size:21171|exec:0|csum:BC0F5D9303917F2F546699321F8A3DDC
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\tx_async.v|io:i|time:1776096673|size:8868|exec:0|csum:B35DCAF81EF7E85CD7351D3D45E7E337
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\fifo_256x8_g5.v|io:i|time:1776096673|size:8300|exec:0|csum:DC66C449F8B4130521BB3A7329D79E30
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\coreuart.v|io:i|time:1776096673|size:14320|exec:0|csum:822832B34C8D6C5E8760DD9AA66EF06C
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0_0\rtl\vlog\core\coreuartapb.v|io:i|time:1776096673|size:13967|exec:0|csum:E36F6F862A5C1E1F671225681A6CB7BE
|
|
file:..\..\component\work\coreuartapb_0\coreuartapb_0.v|io:i|time:1776096673|size:5286|exec:0|csum:0031C0D3239EBED4FC94A85811D0A05A
|
|
file:..\..\component\work\core_reset_pf\core_reset_pf_0\core\corereset_pf.v|io:i|time:1776096662|size:2663|exec:0|csum:AF745F90A61AFFC77B577330D1D4948C
|
|
file:..\..\component\work\core_reset_pf\core_reset_pf.v|io:i|time:1776096662|size:3396|exec:0|csum:026E49C845792B8F992106429ABD3FE5
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\pkg\miv_rv32_hart_cfg_pkg.v|io:i|time:1776075084|size:8274|exec:0|csum:24141E53E61B64B2A72BB0A4DF2B4080
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\pkg\miv_rv32_pkg.v|io:i|time:1776075084|size:91878|exec:0|csum:02D23117CB25D3A34B6814334FF3B18A
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\hart_merged\miv_rv32_hart_merged.v|io:i|time:1776075084|size:2231213|exec:0|csum:83DB46D03606EB2BB9BC16407D2C0C00
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\pkg\miv_rv32_subsys_pkg.v|io:i|time:1766140232|size:18418|exec:0|csum:34B846EF12BD71A23BDF63B177FBFFDC
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\subsys_merged\miv_rv32_subsys_merged.v|io:i|time:1776075084|size:769533|exec:0|csum:BEC9DF5BE15918D9BFED9F8AB2B4567F
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\memory\miv_rv32_ram_singleport_lp.v|io:i|time:1776075084|size:2646538|exec:0|csum:468204FEE3443C3386696F2B78BDD0E3
|
|
file:..\..\component\microsemi\miv\miv_rv32\3.1.200\memory\miv_rv32_ram_singleport_lp_ecc.v|io:i|time:1776075084|size:2731825|exec:0|csum:AE0518B0A8233BE3FD9C713892BEB72E
|
|
file:..\..\component\work\miv_rv32_c0\miv_rv32_c0_0\rtl\miv_rv32.v|io:i|time:1776096674|size:33259|exec:0|csum:9AD84F17C23E45DF6EA034CC53C3BA00
|
|
file:..\..\component\work\miv_rv32_c0\miv_rv32_c0.v|io:i|time:1776096674|size:15029|exec:0|csum:C11F5B7BF255E72C9C49A1783705B4A6
|
|
file:..\..\component\work\pf_ccc_0\pf_ccc_0_0\pf_ccc_0_pf_ccc_0_0_pf_ccc.v|io:i|time:1776096714|size:3889|exec:0|csum:8D115DD18BDD9A4DED8CE3B0A6EA5940
|
|
file:..\..\component\work\pf_ccc_0\pf_ccc_0.v|io:i|time:1776096714|size:10298|exec:0|csum:1FFB238A4891624653589E53810D254F
|
|
file:..\..\component\actel\directcore\corecdr4_cntl_tip\2.0.100\rtl\vlog\core\corecdr4_cntl_tip.v|io:i|time:1776088270|size:9425|exec:0|csum:CC870E83873A278F74B81D3C75067C91
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_iod_cdr_lanectrl_overlay_0\pf_iod_cdr_c0_pf_iod_cdr_lanectrl_overlay_0_pf_iod.v|io:i|time:1776096730|size:4134|exec:0|csum:50F3FD0B8AFD4ED004C5EE9297CEAEB8
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_iod_cdr_rx_n_0\pf_iod_cdr_c0_pf_iod_cdr_rx_n_0_pf_iod.v|io:i|time:1776096736|size:3762|exec:0|csum:597B9E0D1C9BED8CE0A651840784F1B9
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_iod_cdr_rx_p_0\pf_iod_cdr_c0_pf_iod_cdr_rx_p_0_pf_iod.v|io:i|time:1776096742|size:3814|exec:0|csum:1E1F151E7202D6066B08699AEDEDAA30
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_iod_cdr_tx_0\pf_iod_cdr_c0_pf_iod_cdr_tx_0_pf_iod.v|io:i|time:1776096747|size:6088|exec:0|csum:BA7AD857881BBFF48FC5C0B66DBD4485
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_lanectrl_0\pf_lanectrl_pause_sync.v|io:i|time:1776096749|size:3696|exec:0|csum:014DDF7700880B5934F511C144FEDBC0
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_lanectrl_0\pf_iod_cdr_c0_pf_lanectrl_0_pf_lanectrl.v|io:i|time:1776096749|size:4824|exec:0|csum:C00F4166A1379B50AC3FDF070ED0D58E
|
|
file:..\..\component\work\pf_iod_cdr_c0\pf_iod_cdr_c0.v|io:i|time:1776096750|size:113118|exec:0|csum:CEB577E2F89CC0EE47B3D1CDBD5404E7
|
|
file:..\..\component\actel\directcore\coredelaycode_tip\2.1.100\rtl\vlog\core\coredelaycode_tip.v|io:i|time:1776087985|size:5136|exec:0|csum:3F9B11EF43AA0D288710D66DD9231414
|
|
file:..\..\component\work\pf_iod_cdr_ccc_c0\pf_ccc_0\pf_iod_cdr_ccc_c0_pf_ccc_0_pf_ccc.v|io:i|time:1776096763|size:6887|exec:0|csum:E952EB76AF17959691096D5B822F13E2
|
|
file:..\..\component\work\pf_iod_cdr_ccc_c0\pf_clk_div_0\pf_iod_cdr_ccc_c0_pf_clk_div_0_pf_clk_div.v|io:i|time:1776096764|size:425|exec:0|csum:50DD83DA67F70F87F3F7DC617C8DC1BB
|
|
file:..\..\component\work\pf_iod_cdr_ccc_c0\pf_lanectrl_core_reader_0\pf_lanectrl_pause_sync.v|io:i|time:1776096766|size:3712|exec:0|csum:7A730869140FC89F3C452186A1D3555C
|
|
file:..\..\component\work\pf_iod_cdr_ccc_c0\pf_lanectrl_core_reader_0\pf_iod_cdr_ccc_c0_pf_lanectrl_core_reader_0_pf_lanectrl.v|io:i|time:1776096766|size:4449|exec:0|csum:78C790C30079FCCBCF01BDB865E3954E
|
|
file:..\..\component\work\pf_iod_cdr_ccc_c0\pf_iod_cdr_ccc_c0.v|io:i|time:1776096766|size:10422|exec:0|csum:01952DF578F9DA896D8BCD5AC7C0BFF5
|
|
file:..\..\component\work\pf_tpsram_c0\pf_tpsram_c0_0\pf_tpsram_c0_pf_tpsram_c0_0_pf_tpsram.v|io:i|time:1776384266|size:7800|exec:0|csum:6B6E89FDC95CC9ACFB54F5EA079A0464
|
|
file:..\..\component\work\pf_tpsram_c0\pf_tpsram_c0.v|io:i|time:1776384266|size:3681|exec:0|csum:2C4D8ECEFDB7B267CADC9A6B3C5FBE60
|
|
file:..\..\hdl\ssdetect.v|io:i|time:1776096660|size:1303|exec:0|csum:B1DE31CF69E722328385285FC8EA71CB
|
|
file:..\..\hdl\fifo_to_tpsram_bridge.v|io:i|time:1776394591|size:3691|exec:0|csum:D743BED45A1F2FCB2AD4AE5CD7F4FBC3
|
|
file:..\..\component\work\pf_init_monitor_0\pf_init_monitor_0_0\pf_init_monitor_0_pf_init_monitor_0_0_pf_init_monitor.v|io:i|time:1776096718|size:1917|exec:0|csum:0929B5BC80430595FD8EC2B2AD9440DF
|
|
file:..\..\component\work\pf_init_monitor_0\pf_init_monitor_0.v|io:i|time:1776096718|size:9508|exec:0|csum:A87938D4723833F3074C70D895C9DD1E
|
|
file:..\..\component\work\top\top.v|io:i|time:1776394606|size:26020|exec:0|csum:E67B7814EE0314F50AB33227D7647533
|
|
file:..\..\..\..\..\microchip\libero_soc_2025.1\libero_soc\synplify_pro\bin64\c_hdl.exe|io:i|time:1745943378|size:7451136|exec:1|csum:81E371ADEC4225EB70244ABCF02702E7
|