22 lines
952 B
Plaintext
22 lines
952 B
Plaintext
###########################################################[
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Copyright (C) 1994-2023 Synopsys, Inc.
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This Synopsys software and all associated documentation are proprietary to Synopsys, Inc.
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and may only be used pursuant to the terms and conditions of a written license agreement
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with Synopsys, Inc. All other use, reproduction, modification, or distribution of the
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Synopsys software or the associated documentation is strictly prohibited.
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Tool: Synplify Pro (R)
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Build: V-2023.09M-5
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Install: E:\Microchip\Libero_SoC_2025.1\Libero_SoC\Synplify_Pro
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OS: Windows 10 or later
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Hostname: SOFTWARE-PC
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Implementation : synthesis
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Synopsys VHDL Compiler, Version comp202309synp1, Build 540R, Built Apr 29 2025 09:15:16, @
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@N|Running in 64-bit mode
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@I:: "E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\syntmp\genpkg2735a42304"
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@I:: "syng0a42304"
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@I:: "E:\AbhishekV\rising\ethernet_tpsram_test\synthesis\syntmp\gentmp2735a42304"
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VHDL syntax check successful!
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