• top_syn (synthesis)
  • Synthesis -
    • Compiler Report
    • Compiler Constraint Applicator
    • Pre-mapping Report
      • Clock Summary
    • Mapper Report
      • Timing Report
        • Performance Summary
        • Clock Relationships
        • Interface Information
          • Input Ports
          • Output Ports
        • Detailed Report for Clocks
          • Clock: COREJTAGDEBUG_Z5|iUDRCK_inferred_clock
            • Starting Points with Worst Slack
            • Ending Points with Worst Slack
            • Worst Path Information
          • Clock: PF_CCC_0_0/PF_CCC_0_0/pll_inst_0/OUT0
          • Clock: PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL/CLK_OUT_R
          • Clock: PF_IOD_CDR_CCC_C0_0/PF_CLK_DIV_0/I_CD/Y_DIV
          • Clock: System
      • DSP Report (08:33 17-Apr)
      • RAM Report (08:35 17-Apr)
      • Fanout Report (08:35 17-Apr)
      • Resource Utilization
    • High Reliability Report (08:35 17-Apr)
    • Constraint Checker Report (08:31 17-Apr)
      • Unconstrained Start/End Points
      • Inapplicable constraints
      • Applicable constraints with issues
      • Constraints with matching wildcard expressions
      • Library Report
    • Hierarchical Area Report(top) (08:36 17-Apr)