# timing_clock_relationships

metric: rise_rise_constraint
value: 8.000
units: ns
job: fpga_mapper
object:
PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL/CLK_OUT_R->PF_IOD_CDR_C0_0/PF_LANECTRL_0/I_LANECTRL/CLK_OUT_R


