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head tail filter testing done

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abhishekpythons
2026-04-17 18:14:15 +05:30
parent e4b91625ea
commit a8e7c14f45
294 changed files with 209839 additions and 208687 deletions
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12
synthesis/syntmp/top_ram_rpt_txt.htm
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@@ -1,5 +1,5 @@
<html><body><samp><pre>
<!@TC:1776273296>
<!@TC:1776394639>
##### START OF RAM REPORT #####
@@ -14,7 +14,7 @@ NO CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.rx4096x36_
CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.rx4096x36_1.oi0Io_oi0Io_0_4 4KX5_4KX5 0 0 0(0/0/0) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST)
CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.rx4096x36_1.oi0Io_oi0Io_0_5 4KX5_4KX5 0 0 0(0/0/0) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST)
CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.rx4096x36_1.oi0Io_oi0Io_0_6 4KX5_4KX5 0 0 0(0/0/0) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST)
CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.rx4096x36_1.oi0Io_oi0Io_0_7 4KX4_4KX4 0 0 0(0/0/0) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST)
CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.rx4096x36_1.oi0Io_oi0Io_0_7 4KX4_4KX4 0 0 1(1/1/1) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST)
NO CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.tx2048x40_1.oi0Io[39:0] RAM DEFAULT CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.tx2048x40_1.oi0Io_oi0Io_0_0 2KX10_2KX10 0 0 0(0/0/0) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST) RAM instance meets the required threshold for mapping using LSRAM.
CORETSE_0_inst_0.CORETSE_0_0.CoreTSE_TOP_INST.lOIO1\.tx2048x40_1.oi0Io_oi0Io_0_1 2KX10_2KX10 0 0 0(0/0/0) 0(0/0/0) (WRITE_FIRST/WRITE_FIRST)
@@ -61,9 +61,13 @@ YES MIV_RV32_C0_0.MIV_RV32_C0_0.u_ipcore_0.gen_tcm0\.u_subsys_TCM_0
YES MIV_RV32_C0_0.MIV_RV32_C0_0.u_ipcore_0.gen_tcm0\.u_subsys_TCM_0.tcm_ram_macro\.u_ram_0.miv_rv32_ram_singleport_lp_R9C0 NA NA MIV_RV32_C0_0.MIV_RV32_C0_0.u_ipcore_0.gen_tcm0\.u_subsys_TCM_0.tcm_ram_macro\.u_ram_0.miv_rv32_ram_singleport_lp_R9C0 512X40_512X40 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
YES PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0 NA NA PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0 1KX20_1KX20 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
YES PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0 NA NA PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C0 2KX10_2KX10 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
YES PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1 NA NA PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1 1KX20_1KX20 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
YES PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1 NA NA PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C1 2KX10_2KX10 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
YES PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2 NA NA PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C2 2KX10_2KX10 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
YES PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3 NA NA PF_TPSRAM_C0_0.PF_TPSRAM_C0_0.PF_TPSRAM_C0_PF_TPSRAM_C0_0_PF_TPSRAM_R0C3 2KX10_2KX10 NA 0 0(0/0/0) 0(0/0/0) (NO_CHANGE/NO_CHANGE)
=====================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================
##### URAM REPORT #####